Engineer · Founder · Innovator|

Engineering Intelligence. Building What's Next.

Electronics and Communication Engineer at SRMIST, conducting semiconductor VLSI research in Cadence Virtuoso and co-inventor of an Indian registered design for adaptive neural bionics. Through Alistron, connecting technical invention with practical STEM education.

Design Registered
No. 504827-001
Patent Office, Govt of India
Semiconductor
Cadence Virtuoso
6T vs 8T SRAM Analysis
Alistron STEM
Robotics Curricula
Hands-On School Labs
Aryan Jaiswal — Engineer, Founder of Alistron, Innovator
Aryan Jaiswal
B.Tech ECE · SRMIST Ghaziabad
Personal Philosophy

Engineering from the silicon substrate upward.

My engineering work is rooted in understanding systems at the physical boundary: where gate voltages dictate leakage currents in sub-1V SRAM cells, where mechanical linkages give robotic hands natural compliance, and where microcontrollers interface directly with transducers. Through Alistron, this conviction extends into education—teaching students that true engineering begins with breadboards, multimeters, and physical prototypes rather than passive simulations.

Selected Flagships

Featured Engineering Systems

Curated highlights spanning registered patent bionics, low-voltage semiconductor simulation in Cadence Virtuoso, and EDA circuit analysis tooling.

Explore Project Directory (8)
Robotics & Bionics
Granted Registered Design

Brain-Controlled Robotic Hand with Adaptive AI & Haptic Feedback

Granted Indian Registered Design No. 504827-001 for adaptive neural-interfaced bionics

A brain-interfaced bionic hand architecture combining adaptive artificial intelligence with micro-actuated haptic feedback, granted registered design protection by the Patent Office, Government of India.

Problem: Traditional myoelectric prosthetics suffer from high rejection rates due to lack of tactile feedback, high latency, and rigid pre-programmed grasp patterns that fail on everyday asymmetrical objects.
Approach: Engineered an anthropomorphic 5-finger articulated mechanical structure coupled with closed-loop adaptive grip pressure regulation and cutaneous haptic feedback actuators to inform the user of grasp contact and slip.
Design Status
Granted (2026)
Design ID
504827-001
Control Loop
Closed-loop tactile
Articulation
Multi-axis grasping
RoboticsBionicsNeural ControlAdaptive AI+2
Explore Case StudyDesign No. 504827-001
VLSI & Semiconductors
Ongoing Research

Comparative Study of 6T and 8T SRAM Cells under Low-Voltage Operation

Cadence Virtuoso transistor-level simulation evaluating stability margins and leakage at sub-1V VDD

In-depth semiconductor research comparing standard 6T and decoupled 8T static RAM cell architectures under aggressive supply-voltage scaling, analyzing Static Noise Margin (SNM), read-disturb vulnerabilities, and leakage power.

Problem: As supply voltages scale below 0.8V to minimize active power in IoT and edge hardware, standard 6T SRAM cells encounter dramatic degradation in Read Static Noise Margin (RSNM) due to voltage-divider action at storage nodes, leading to destructive read upsets.
Approach: Built complete transistor-level schematic topologies in Cadence Virtuoso. Simulated DC butterfly curves to extract Hold SNM, Read SNM, and Write Trip Voltage (WTV) across varying VDD supply levels, evaluating how the decoupled read buffer of the 8T topology alleviates read-disturb.
EDA Suite
Cadence Virtuoso
Supply Voltage
Sub-1V Scaling
Topologies
6T vs 8T CMOS
Research State
Active Simulation
VLSICadence VirtuosoSRAMLow-Voltage+2
AI & Software
Completed

RLC Frequency Response Simulator & Automated SPICE Netlist Generator

Full-stack circuit analysis platform with real-time Bode plot visualization and transient solver

A full-stack computer-aided engineering platform for series and parallel RLC network simulation, calculating resonance, quality factor (Q), bandwidth, and generating automated SPICE netlists with real-time Bode plots.

Problem: Undergraduate engineers and hardware hobbyists frequently struggle to visualize how passive component tolerances, parasitic resistance, and damping factors distort high-frequency circuit response before hardware fabrication.
Approach: Engineered mathematical state equations in Python/NumPy exposed through a RESTful Flask API. Built an interactive browser frontend that renders real-time logarithmic magnitude and phase Bode plots, sensitivity curves, and automated downloadable SPICE netlists.
Analysis
AC & Transient
Math Engine
NumPy Vectorized
Latency
< 25ms response
Export
SPICE .cir format
PythonFlaskReact.jsNumPy+3
Founder Venture · www.alistron.in

Alistron: Practical Robotics & Hands-On STEM Education.

“Engineering Ideas for a Smarter Tomorrow”

Alistron is an engineering and technology initiative focused on robotics, intelligent hardware, and practical STEM education. We design and deliver school-based robotics workshops, Arduino embedded training, and hardware bootcamps that help students explore technology by making, testing, and improving real physical prototypes.

01
Discover
02
Assemble
03
Program
04
Test & Improve
Alistron Hands-On Technical Workshop Poster
Official Alistron Technical Workshop Material
Verified Credentials & Research

Intellectual Property & Semiconductor Research

Distinct technical destinations documenting the registered design bionic patent and low-voltage SRAM cell analysis.

Intellectual PropertyDesign No. 504827-001

Indian Registered Design: Brain-Controlled Bionic Hand

The Patent Office, Government of India · Issued 27/08/2026

Official registration under the Designs Act 2000 for an AI-driven, brain-controlled robotic prosthetic hand design integrating closed-loop adaptive grasp pressure regulation and cutaneous haptic feedback.

Semiconductor ResearchCadence Virtuoso

Comparative Study of 6T and 8T SRAM Cells

Low-Voltage Operation · Sub-1V Supply Scaling

Transistor-level simulation evaluating Static Noise Margins (SNM), read-disturb vulnerabilities, and subthreshold leakage power trade-offs between standard 6T and decoupled 8T memory topologies.

Open for Engineering, Research & Alistron Enquiries.

Whether you are evaluating professional engineering opportunities, exploring semiconductor research collaboration, or looking to bring an Alistron robotics workshop to your institution, I welcome direct correspondence.